IDesignSpec - Executable Specification
Executable Specification Tool
BA22 32-bit Embedded Processor
Implements a 32-bit RISC processor for deeply embedded applications that use off-chip instruction and data memories and that may need to run a real-time operating system (RTOS). Part of the royalty-free BA22 family, this processor core is extremely competitive in terms of high performance and low power consumption, and has...
Method Park America Inc.,
Stages allows you to model your process, assures the compliance of your processes to standards and communicates your process descriptions to your teams. Stages can be integrated with your configuration management system to manage project documents in compliance with the defined process.
Soc Solutions Cloud
Click on "Launch Software" and connect to the cloud to use Instant Chip to quickly and easily create AMBA Microprocessor based IP Platforms.
Try the Socrates Tools at www.xuropa.com/zone.php?zone_id=117. OCP Tracker is a graphical performance analysis engine for OCP-based SoC infrastructures. 3D and 2D visualization of performance related data is one of the keys to understanding how the system can cope with different types of traffic, enabling the identification and understanding of weaknesses in the...
Sodius delivers interoperability solutions that unlock your assets and accelerate your engineering processes, empowering innovation. Data in proprietary formats holds enormous value but remains inaccessible outside the native environment. Our products maximize the value of your engineering data. Our software includes the powerful MDWorkbench platform for implementing engineering data transformations. This...
BigLever Software, Inc.
BigLever Software Gears
With BigLever's Gears Product Line Engineering Tool and Lifecycle Framework™, your business and engineering organizations can shift perspective to focus on a single production line capable of automatically producing all the products in your product line portfolio from a consolidated set of soft assets – rather than focusing on the...
Cadence Design Systems
Formal Verification of the UART Lab
This lab takes you through the Universal Asynchronous Receiver/Transmitter (UART) formal verification flow using Cadence's Incisive Formal Verifier (IFV). This is Lab 3 of the Assertion Based Verification Workshop from the IP Verification Kit Lab includes: - Automatic Formal Analysis - User Generated Properties Click "Launch Software" at left to open a VNC session...
Cadence Design Systems
Cadence VIP Catalog Lab #1
Follow these steps to run a demo: 1) Select the Resources tab on this page 2) Click the filed named "How to start a demo" and read about the demo Learn more about Cadence VIP (cut & paste to browser): http://www.bit.ly/GUsAJK
Xuropa Windows Cloud Demonstration
Click on the Launch Software button and you'll be connected to the remote desktop. It may take a few minutes to connect as your cloud instance is being prepared.