Top 10 Interlaken Protocol IP Cores and Verification IP

Interlaken is the name of a very picturesque town in Switzerland (pictured), but it’s also the name of the next communications protocol that will be driving a cloud near you! Maybe the fact that Interlaken, the town, sits between two huge lakes in the Alps is what inspired the name of the protocol. Think of the lakes as huge pools of data that needs to move from one lake to another. You get the idea.

Chip-to-chip bandwidth is one of the major bottlenecks in cloud computing as the amount of data that needs to be moved around increases incessantly. Cisco and Cortina Systems recognized the need in 2006 and announced the protocol.  The two companies joined with Silicon Logic Engineering (now part of Open-Silicon) in 2007, and put out an Interlaken Technology White Paper.

The whitepaper summarizes the protocol, “Interlaken is an interconnect protocol optimized for highbandwidthand reliable packet transfers. It uses bundles of serial links to create a logical connection between components with multiple channels, backpressure capability, and data-integrity protection to boost the performance of communications equipment.”

So, if you were to design and verify an Interlaken core on your next chip integration.  Where would you get your IP core, and where would you get your Verification IP (VIP)? After looking around, this is what we found.

Interlaken Controller IP Core
Open-Silicon’s Interlaken IP is a scalable, high-speed chip-to-chip interface protocol that builds on the channelization and per-channel flow control features of SPI4.2, while reducing the number of chip I/O pins by using high-speed SerDes technology, similar to XAUI…more
Interlaken IP Core
Xilinx Interlaken IP core is based on Sarance Technologies Best-In-Class Intellectual Property
Interlaken is a scalable chip-to-chip interconnect protocol designed to enable transmission speeds from 10Gbps to 150Gbps…more
Altera’s Interlaken intellectual property (IP) continues to scale with today’s demand for more bandwidth and higher performance needs…more
Interlaken Controller IP Core
Flowgic’s Interlaken IP core is an efficient implementation of Interlaken Protocol version 1.2. Interlaken IP core is designed for flexibility, robustness, scalability and is available in 64(10-20 Gb/s), 128(20-40Gb/s), 256(40-80Gb/s) and 384(80-120Gb/s) bit datapath variants…more
Interlaken IP Core
The Interlaken is a high speed, narrow, channelized and highly configurable chip-to-chip interface protocol. It offers programmable burst sizes, per-channel backpressure, source-asynchronous nature and scalability…more
3G to 600G Interlaken ILK and ILA IP Core
Tamba offers industry’s lowest latency, power, and size solution for the Interlaken communication protocol. The Universal Interlaken IP Core can be customized from 1 Gbps to 600 Gbps and targeted to both FPGA and ASIC platforms…more
XCI4FIC 100G Interlaken Fabric Interface Core
The Xelic 100G Interlaken Fabric Interface Core (XCI4FIC) provides the flexible transport of channelized signals for both segment mode and packet mode transmission formats with configurable lane number support. Flow control is provided for both in-band and out-of-band methods with optional automatic and override insertion capability…more
Interlaken VIP
The Interlaken Verification IP is compliant with 1.2 specifications and verifies Interlaken interfaces of designs Interlaken Interface. It can work with SystemVerilog,Vera, SystemC, E and Verilog HDL environment…more
Rockfish Technologies
INTERLAKEN ASIC IP
The Optimized Interlaken Protocol IP block from Rockfish Technology supports all the published extensions and interoperability recommendations from the Interlaken Alliance including…more
Rockfish Technologies
INTERLAKEN VERIFICATION IP
The Vermilion BFM bridges the gap between the user’s testbench and an Interlaken Device Under Test (DUT). Vermilion BFM Egress Interlaken Framing Layer Features…more


Posted under cloud, software

This post was written by James Colgan on March 8, 2013

Tags: , , ,


 

“Confidentiality is Overrated!”

OK.  This one’s a bit controversial, and I don’t necessarily subscribe to it. But…. someone whom I respect greatly as a high tech executive made that statement in a coffee conversation last week, and I thought I’d be interesting to share his point of view.

His point was simply that engineering mentality in any high tech industry has such a strong sense of NIH (Not Invented Here) that even if you present them your IP (patent), they won’t use the IP since they believe can do it better themselves and that the IP is “of no real value”.
I know from personal experience (having worked in an IP company once) that an engineer’s first reaction to an IP is that “it’s no good” and her IP is just much more relevant.  In fact in one case, I remember the engineering team I was dealing with didn’t want to sign the Non-Disclosure Agreement (NDA) since they didn’t want to even see the IP to avoid contamination as they were sure they were going to invent something “better”.
As it turns out, the value of IP, just like anything else, is in the eye of the beholder.  So if the engineer might think the IP is irrelevant, his management might think otherwise and see it as extremely relevant since it could provide them a economic advantage or at least a leveled playing field.
Confidentiality might be overrated (in a hyper-practical view) but also in the same hyper-practical view, it never hurts to have one (e.g. NDA) in place to remove all possible future issues.

Posted under business, career, industry, marketing

Electronic Design Industry Snapshot

 There’s always a lot going on in the electronic design industry, but recently it seems particularly active.  It’s become a routine of mine to cruise the news feeds we bring into Xuropa to get a sense of what’s going on at different points in the value chain.

Here is a brief snapshop of what I saw today

Embedded Systems

Looking to the embedded world, there’s an interesting “the news of my demise is greatly exaggerated” post over at the Windows Embedded Blog.  After comments about how little Windows CE gets mentioned and a recent New York Times article focuses on Windows 7 for a “small world”, there was some “divining” (”wishing”?) going on in the blogosphere.

According to Mike Hall of Microsoft, they’re hard at work on a new release of the OS right now.  Hopefully it fixes all of the bugs that I ran into during my fated experience with it on the HTC Dash.  (Bad, bad memories.)

Bringing the methodology and tools of application level software and hardware platform development closer together appears to be paramount when the two are developed by different companies.  A point made by Jim Hogan in an interview with Ed Sperling.

Consumer Industry

Although news of the change in fortune of Steve Job’s health last week was sad, the amount of coverage it received was staggering.  Everywhere I turned my radio “dial” on the day of the announcement had it every 15 to 20 minutes.  Even the BBC was running it as the top or second news summary item throughout the day.

Now that the dust has settled and the reality of the situation has started to set in, speculation on succession has begun.  The clear lesson for the electronic design industry is the process of succession itself.  The development of a deep management bench and the instilling of a clear direction and set of corporate values are paramount.

EDA Industry

It was a breath of fresh air to read that OneSpin have spun their technology into a family of interoperable formal verification products.  The real news was the emphasis on usability they appear to have taken.  This is an excellent example of a company that has listened to their customer, really understood the reason for slower-than-liked adoption, and then has done something about it.

Too many EDA companies believe that it’s just “one more feature” that will make all the difference in the world.  When in reality it’s the usability of the features they already have and the company’s ability to communicate the value of them that’s at fault.

This reminds me of Beach Solutions, who unfortunately met their demise late last year.  They struggled for years with confusing messaging and a technology lead.  By the time the products were packaged into something comprehensible to the customer, and the emphasis was moved from “what it is” to “what it does”, it was too late.  They’d managed to go from little-to-no engagements to evaluations all over the globe in a matter of months.  Unfortunately the EDA sales process and the waning world economy appear to have taken their toll.

The curious thing is the acquisition by Duolog.  Given that their new marketing at DAC 2008 was almost identical to Beach’s one would have thought they didn’t need the Beach technology.

There are some more sobering words and grim interpretations about the industry from Gabe Moretti over at EDA Design Line

Semiconductor Woes

ChipMOS files a lien against Spansion inventory and equipment for the $18M it is owed.  That’s a tremendous amount of money in any economy, and a sure sign of trouble when vendors start suing customers.  There’s also a rumor that Spansion may file Chapter 11.

Technology Sector Jobs

There was some light at the end of the tunnel reported up in Oregon by Mike Rogoway.  According to his information, tech industry employment figures for Oregon improved in December.  He also has a tally of tech job losses in the state.  I wonder if someone is keeping score in Silicon Valley.

EDA Investment & Value

There was a great interview by Ed Sperling of Jim Hogan.  He covered many macro-level aspects of the EDA industry from the business model, technical challenges, and industry make-up.  More on this interview here.

Posted under business, industry, marketing

This post was written by James Colgan on January 20, 2009

Tags: , , , , , , , ,